This invention is in the field of semiconductor integrated circuits, and is more specifically directed to metal-oxide-semiconductor (MOS) power transistor switches.
Many modern electronic devices and systems ultimately rely upon the controlled switching of high power levels to a load. For example, electronic devices that produce audio signal output require the controlled switching of significant levels of energy (current or voltage) to a physical speaker. Control systems also require the switching of significant energy to electronically operated machinery and the like. Solid state transistors effecting such power switching are now in widespread use, due to advances in the technology.
In order to reduce the cost of the overall device or system, it is of course desirable to integrate as much of the solid state circuitry of the device or system into fewer integrated circuits, ultimately into a single integrated circuit. In recent years, a preferred device technology for accomplishing such integration has been metal-oxide-semiconductor (MOS) technology, preferably complementary metal-oxide-semiconductor (CMOS) technology, which implements both p-channel and n-channel MOS transistors, as is fundamental in the art. It is therefore desirable to implement power switching by way of CMOS technology, to obtain the benefits of very large scale integration.
FIG. 1a schematically illustrates a conventional MOS power switching circuit including power switching transistor 22. In this simplified arrangement, power switching transistor 22 is a p-channel MOS transistor, having its source connected to input IN to receive a high power signal, and its drain connected to pull-down load Z at output OUT. Power switching transistor 22 is sufficiently large, in terms of channel length and width, enabling it to conduct large currents and to handle large drain-source voltages. The body node, or channel node, of power switching transistor 22 is connected to its source in this conventional implementation; this connection is commonly referred to as the “back-gate” bias. Load Z is connected between the drain of power switching transistor 22 and ground, and presents an impedance so that energy from input IN is transferred to output OUT when power switching transistor 22 is turned on, while pulling down output OUT when power switching transistor 22 is off.
The gate of power switching transistor 22 is connected to control line ON_/OFF, which applies a control signal to turn the device on and off. Because power switching transistor 22 is p-channel, a low level on control line ON_/OFF relative to the voltage on input IN will turn on power switching transistor 22, to conduct current from input IN to load Z. Conversely, a high voltage on control line ON_/OFF, within a threshold voltage of the voltage on line IN, will turn off power switching transistor 22. The voltage at output OUT is thus pulled toward the high voltage of input IN when power switching transistor 22 is on, and is pulled toward ground through load Z when it is off. The circuit of FIG. 1a is often used to generate large drive currents, of on the order of hundreds of milliamperes or greater.
In normal operation, the voltage at output OUT is lower than the voltage at input IN. In this typical condition, the source-drain leakage through power switching transistor 22 when off is substantially zero, at most in the sub-microampere range. It is of course desirable that the source-drain leakage be at these low levels whenever power switching transistor 22 is off, especially when implemented into a battery-powered device such as a wireless telephone handset.
However, it is possible for the voltage at output OUT to be higher than the voltage at input IN. One such fault situation occurs when power switching transistor 22 is turned off and the voltage at input IN then falls, so that the voltage at output OUT at the drain of power switching transistor 22 stays higher than that of the newly fallen voltage at the source of power switching transistor 22. This can occur if an external device connected to output OUT, such as an electrolytic coupling capacitor, maintains the voltage at output OUT for some time after power switching transistor 22 is turned off. Another cause of a reverse voltage condition is the external driving of output OUT to a voltage above that of input IN.
In these situations, the drain voltage of power switching transistor 22 when off will be higher than the voltage at its source. This bias condition can cause significant leakage from drain to source, considering that parasitic diode D at the p-n junction between the drain and body node of power switching transistor 22 will be forward biased due to the body node being connected to the lower voltage at the source of power switching transistor 22. The resulting reverse leakage can be significant, in some cases large enough to damage power switching transistor 22.
To address this possibility for large drain-source leakage in power switching transistors, it is known to switch the body node connection of the power switching MOS transistor in response to circuit conditions. FIG. 1b illustrates this conventional concept in a generic fashion, in which a pair of transistors 28p, 28n selectably connect the body node of power switching transistor 22′ to either its source (at input IN) or drain (at output OUT) according to the state of the circuit.
In this conventional switched body node arrangement, PMOS transistor 28p has its source connected to the source of power switching transistor 22′, and its drain connected to the body node of transistor 22′ and to the drain of NMOS transistor 28n. NMOS transistor 28n has its source connected to the drain of power switching transistor 22′. Each of transistors 28p, 28n has its respective body node connected to its source, and the gates of transistors 28p, 28n are connected together to line SW. The state of line SW may be controlled by the state of line ON_/OFF at the gate of power switching transistor 22′, or alternatively may be driven from a comparator in response to the relative voltage of input IN to output OUT.
According to this conventional approach, transistors 28p, 28n are controlled so that the body node of power switching transistor 22′ is connected to either the drain or source of transistor 22′, whichever is at a higher voltage than that of the body node of power switching transistor 22′. This controlled switching is intended to ensure that a reverse-biased diode is always in place between the source and drain of transistor 22′. In normal operation, where the voltage at input IN is equal to or higher than the voltage at output OUT, line SW will be maintained low (e.g., by line ON_/OFF being low, or by the output of a comparator indicating that the voltage at output OUT is below that of input IN). This turns off NMOS transistor 28n, and turns on PMOS transistor 28p, connecting the body node of power switching transistor 22′ to its source.
Conversely, to avoid reverse leakage, line SW is driven high, to about the voltage at input IN. This turns on NMOS transistor 28n and turns off transistor 28p, connecting the body node of power switching transistor 22′ to its drain. Line SW may be driven high by line ON_/OFF going high to turn off power switching transistor 22′. Alternatively, a comparator may drive line SW high in response to the voltage at output OUT going above that at input IN.
However, it has been observed, in connection with this invention, that this conventional body node switching arrangement has significant limitations. Referring to FIG. 1b, a voltage at output OUT that is significantly higher than that at input IN and on line SW can cause leakage through the series connection of transistors 28p, 28n, even with PMOS transistor 28p turned off. Considering that transistor 28n effectively shorts the body node of transistor 22′ to its drain when on, transistor 28p can turn on if its drain voltage exceeds the voltage at its source (input IN) by the sum of its gate-to-source voltage plus its threshold voltage. If transistor 28p turns on, the reverse leakage through the series chain of transistors 28n, 28p, from output OUT to input IN, can be significant, even in this conventional arrangement in which the body node bias of power switching transistor 22′ is controlled.
It has also been observed that overvoltage device specifications have become more stringent, relative to the manufacturing technology. Modern devices are required to guarantee extremely low reverse leakage levels, even under significant reverse voltage conditions.